Consumers continue to demand complex functional circuits, with higher performance and lower cost, such as data processors, very large scale integrated circuits (VLSI), systems on chips (SoCs), central processing unit (CPU) cores, advanced processing units (APUs), graphics processing unit (GPU) cores, memory sub-systems, system controllers, and peripheral functions. At the same time, many of these functional circuits have diverse expectations when the computer system performs memory accesses, while executing application programs and other software programs. For example, a GPU typically generates a large number of memory accesses and expects high memory bandwidth, while a CPU typically generates fewer memory accesses and expects low-latency transactions.
A computer system generally includes at least one memory controller that schedules and manages accesses to the memory for multiple memory access generating circuits. Not only is it difficult for the memory controller to manage the demands of a particular functional circuit, it is even more difficult for the memory controller to manage the demands of several functional circuits generating concurrent memory accesses. System performance is degraded if the memory controller is not meeting the expectations of one or more of the functional circuits, and overall system performance is even further degraded if some of the functional circuits are “starving” for timely memory accesses.
Also, the memory controller has the responsibility to meet strict timing deadlines, generally complicating the memory controller's ability to balance the scheduling of high bandwidth memory accesses and low latency memory accesses. For example, the Joint Electron Devices Engineering Council (JEDEC) organization defines increasingly strict timing specifications for burst read operation and burst write operation, for double data rate (DDR) synchronous dynamic random access memory (SDRAM).
In the following description, the use of the same reference numerals in different drawings indicates similar or identical items. Unless otherwise noted, the word “coupled” and its associated verb forms include both direct connection and indirect electrical connection by means known in the art, and unless otherwise noted any description of direct connection implies alternate embodiments using suitable forms of indirect electrical connection as well.